Ball grid array (BGA) packages, thermal leadless array (TLA) packages and leadframe-based packages, such as high density leadframe array (HLA) packages, are popular packaging solutions for high I/O devices in the industry. However, existing BGA, TLA and leadframe-based packages suffer from several disadvantages. For example, BGA may offer high pin counts, however, the cost for producing BGA is relatively costly and the thermal performance of the BGA packages requires improvement. On the other hand, there is a need to increase the robustness and reliability of the TLA packages, for example, in terms of lead pull strength and die pad drop, etc. While leadframe-based packages, such as HLA, provide an economical alternative, the process for producing HLA packages is not easy and the package level reliability is limited.
From the foregoing discussion, there is a desire to provide an improved package having very thin package profile, higher I/O counts, fine pitch and flexible routings and with enhanced electrical and thermal performance. It is also desirable to provide simplified methods to produce a reliable package with relatively low cost and which can be flexibly customizable according to design requirements.